Last updated: 10/25/2022
tentative schedule subject to change

Wednesday, October 26 – Benefit Golf Tournament

Thursday, October 27

10:00 – 17:00Attendee Registration Open
10:00 – 13:00Exhibitor Registration Open
12:00 – 14:00Exhibitor Registration Open
Exhibitor Setup in Expo Hall for 34 Booths – Exhibitors Only
13:00 – 13:15
Space Available Seating
Chairman’s Welcome to SWTest Asia 2022 Opening Remarks
Dr. Jerry Broz, SWTest General Chair 
Clark Liu, SWTest Technical Program Chair

Technical Session 1: Getting Manufacturing Smarter

Session Chair: Clark Liu (MJC Taiwan – Taiwan)

13:15 – 13.45
Space Available Seating
Probecard Challenges for Expanding Arrays of Fine Pad Pitch Devices to Test Under Wide Temperature Range
Pouya Dastmalchi, PhD, and Cameron Harker (Formfactor – USA)
Presented by Pouya Dastmalchi, PhD (Formfactor – USA)
13:45 – 14:15
Space Available Seating
TestGeni – Test Development Intelligent Automation
Senthil Kumar Dhamodharan, Nachiappan Gnanasambandam, and Vaishnavi Saravanan (Caliber Interconnect Solutions Pvt Ltd – India)  
14:15 – 14:45
Space Available Seating
Advanced Testing Technology for Future Requirement 
Scott Huang (Kore Semiconductor Co., Ltd. – China)  

14:45 – 15:30 – PM Tea Break in EXPO Hall
14:45 – 18:00 – SWTest Asia EXPO Open

Technical Session 2: Meeting Process Challenges

Session Chair: Alex Yang (MPI Corporation – Taiwan)

15:30 – 16.00
Space Available Seating
Thermal Stability and Properties Of PALYSIUM – Revolutionary Probe Material 
Dr. Jonas Fecher (Heraeus Deutschland GmbH & Co. KG – Germany)
16:00 – 16:30
Space Available Seating
New Generation of Kelvin Spring Pins
Lambert Brost (Technoprobe – USA)  
Presented by Ming-Ting Wu (Technoprobe – Taiwan)
16:30 – 17:00
Space Available Seating
Probe Card Market Dynamics in a Turbulent World
John West and Lin Fu (Yole Intelligence – United Kingdom)  

17:00 – 18:00 – Welcome Reception in Expo Hall

Friday, October 28

8:00 – 14:00Attendee Registration Open
9:00 – 9:15
Chair’s Opening Remarks for SWTest Asia 2022
Dr. Jerry Broz, SWTest General Chair Clark Liu, SWTest Technical Program Chair
9:15 – 10:15
Space Available Seating
Friday Keynote Presentation in General Session Room
Semiconductor, the Information and Communication Technology (ICT) Supply Chain and Geopolitics
Colley Hwang
Digitimes Founder and Chairman
10:00 – 16:00SWTest Asia Expo Open
10:15 – 11:00AM Tea Break in EXPO Hall

Technical Session 3: Test Challenges and Solutions

Session Chair: Dr. Jerry Broz, General Chair (Advanced Probing Systems – USA)

11:00 – 11:30
Space Available Seating
Validation of 55GHz Octal-site Wafer Test Probecard for 5G mmWave device
Peter Cockburn (Cohu, Inc. – United Kingdom)  
11:30 – 12:00
Space Available Seating
Aging parametric testers versus determining measurement system vitality 
Mike Palumbo (Technoprobe – USA)  
Presented by Jeff Arasmith (Technoprobe America Inc. – San Jose, USA)
12:00 – 12:30
Space Available Seating
High Parallelism Probe Card on V93K Direct-Probe™ System to Increase Testing Throughput on Automotive IC
John Kao (Formfactor – Taiwan)

12:30 – 14:00 – Expo Open – Lunch in Expo Hall – Two Sessions (12:30 – 13:15 & 13:15 – 14:00)

Technical Session 4: Power, Magnets, and Memory

Session Chair: Dr. Alan Ferguson (Oxford Lasers – United Kingdom)

14:00 – 14:30
Space Available Seating
Testing challenges for latest SiC and GaN devices
Elia Petrogalli (SPEA S.p.A. – Italy) 
14:30 – 15:00
Space Available Seating
Wafer Level Magnetic Testing of STT-MRAM for Process Control and Chip Sorting in Volume Manufacturing
Siamak Salimy (Hprobe – France) and Henry Chung (HTSI – Taiwan)  
15:00 – 15:30
Space Available Seating
Next Generation DRAM Temperature Requirements and Impacts to Full Wafer Contactor Probe Card Performance
Myung Jin Lee (FormFactor – USA) and Hyun Ae Lee (Samsung Electronics – Korea)  

15:30 – 16:00 – PM Tea Break in EXPO Hall

Technical Session 5: Testing for the Next Generation

Session Chair: Joey Wu (SWTest Asia Committee Member – Taiwan)

16:00 – 16:30
Space Available Seating
Challenges and Improvement Actions for HPC Wafer Testing
Oscar Lee, Harvey Lin, and Hung I Tsai (TSMC – Taiwan)  
16:30 – 17:00
Space Available Seating
Known Good Die Memory Wafter Test Challenge Beyond DDR5 4GHz/8Gbps Speed
Alan Liao (FormFactor – USA)
17:00 – 17:30
Space Available Seating
High wattage dissipation under temperature – a new method for test
evaluation

Klemens Reitinger (ERS electronic GmbH – Germany)
17:30 – 17:45
Space Available Seating
Awards for Best Presentations
17:45 – 18:45Closing Reception in Expo Hall

There will be a total of fifteen 30-minute technical papers, 10 hours of Expo, 3 tea breaks, 1 lunch, and 2 receptions.