Program

Last updated:

Schedule-At-A-Glance

subject to change

For details on the schedule for the 3rd Annual Golf Tournament on Wednesday, November 1, please visit the golf webpage.

Attendee Registration Check-In will be from 8:00 to 17:00 on both Thursday and Friday.

Thursday, November 2
Friday, November 3

Wednesday, November 1

3rd Annual Golf Tournament 

  • 05:30
    Board bus from front entrance of Sheraton Hsinchu
  • 05:45
    Bus leaves Sheraton Hsinchu
  • 06:25
    Arrive at Royal Golf Course
  • 06:30
    Teams Check-in and Breakfast are distributed
  • 06:50
    Tee Time
  • 11:30
    Tournament Play Completed
  • 11:30
    Complimentary Hot Springs & Spa for Golfers
  • 12:00
    Refreshment/Cocktail Hour
  • 12:30
    Lunch Banquet
  • 14:30
    Busses leave for return to Sheraton Hsinchu
  • 15:10
    Busses arrive back to Sheraton Hsinchu

Thursday, November 2

  • 8:00 – 17:00
    Attendee Registration Check-In
  • 8:00 – 10:00
    Exhibitor Registration Check-In
  • 8:00 – 9:30
    Exhibitor Setup in EXPO Hall
  • 8:45 – 9:00
    Chairman’s Welcome
  • 9:00 – 10:00
    Thursday Keynote
  • 10:00 – 10:30
    Tea Break in EXPO Hall
  • 10:00 – 15:30
    EXPO Open
  • 10:30 – 12:00
    Technical Session 1
  • 12:00 – 14:00
    Lunch in EXPO Hall (Two Sessions: 12:00 – 13:00 & 13:00 – 14:00)
  • 12:25 – 12:45
    Tech Showcase 1
  • 12:55 – 13:15
    Tech Showcase 2
  • 13:25 – 13:45
    Tech Showcase 3
  • 14:00 – 15:30
    Technical Session 2
  • 15:30 – 16:00
    Tea Break in EXPO Hall
  • 15:35 – 15:55
    Tech Showcase 4
  • 16:00 – 17:30
    Technical Session 3
  • 17:30 – 18:30
    Welcome Reception / EXPO Open

Friday, November 3

  • 8:00 – 17:00
    Attendee Registration Check-In
  • 8:45 – 9:00
    Friday Program Intro
  • 9:00 – 10:00
    Friday Keynote
  • 10:00 – 16:00
    EXPO Open
  • 10:00 – 10:30
    Tea Break in EXPO Hall
  • 10:05 – 10:25
    Tech Showcase 5
  • 10:30 – 12:00
    Technical Session 4
  • 12:00 – 14:00
    Lunch in EXPO Hall (Two Sessions: 12:00 – 13:00 & 13:00 – 14:00)
  • 12:25 – 12:45
    Tech Showcase 6
  • 12:55 – 13:15
    Tech Showcase 7
  • 13:25 – 13:45
    Tech Showcase 8
  • 14:00 – 15:30
    Technical Session 5
  • 15:30 – 16:00
    Tea Break in EXPO Hall
  • 15:35 – 15:55
    Tech Showcase 9
  • 16:00 – 17:00
    Technical Session 6
  • 16:00 – 17:00
    Exhibitor Move-Out
  • 17:00 – 17:15
    Awards for Best Presentations
  • 17:15 – 19:00
    Taiwan Street Food Festival in Chapel and Gardens

More details coming soon!

Detailed Technical Session Schedule

Thursday, November 2
TimeEvent
8:45 – 9:00Welcome Address for SWTest Asia 2023
Jerry BROZ, PhD, SWTest General Chair (Delphon – USA)
9:00 – 10:00KEYNOTE 1
Advanced Electronic Heterogeneous Integration and Testing

Wei-Chung LO, PhD
Deputy General Director
Electronic and Optoelectronic System Research Laboratories (EOSL)
Industrial Technology Research Institute (ITRI)
10:00 – 10:30Tea Break in EXPO Hall
10:30 – 12:00Technical Session 1: New Probe MFG
Session Chair: Eric CHIA-CHANG (Intel – USA)
10:30 – 11:00Characteristics of The New Pd-based Alloy for Probe-pins, TK-FS, which has three unique features: High Hardness/High Electrical Conductivity/High Ductility
Takeshi FUSE, Kunihiro SHIMA, and Takeyuki SAGAE (TANAKA KIKINZOKU KOGYO K.K. -Japan)
11:00 – 11:30Application of MD (Molecular Dynamics) methodology in the development and verification of advanced MEMS materials for future wafer probe cards
Young Jun PARK, Jin-Wook JANG, Sang Dan KIM, Song Ho KIM, In Suk LEE, Joon Young CHOI (Korea Instrument – South Korea), Changhyun CHO, Joonyeon KIM (Samsung Electronics – South Korea)
11:30 – 12:00Cutting Cost and Resolution Enabled by Novel Photonic Technologies for Next-Generation Probe Cards Manufacturing
Ksenija VARGA and Thomas UHRMANN (EV Group – Austria)
12:00 – 14:00LUNCH (Tech Showcase 1 – 3)
14:00 – 15:30Technical Session 2: Electrical Challenge
Session Chair: Alan FERGUSON (Oxford Lasers – UK)
14:00 – 14:30Contact Resistance Application in Parametric Testing
Iwan KURNIAWAN, Kar Loong LOW and Thiam Seng YIP (Micron Semiconductor Asia Pte. Ltd. – Singapore)
14:30 – 15:00SiC, GaN and more: Probing Technologies for HV/HC Power Devices
Rainer GAGGL (T.I.P.S. Messtechnik GmbH – Austria)
15:00 – 15:30Current Carrying Capacity Maximization in Probe Cards And the Path to An Unburnable Probe
Hadi NAJAR (Form Factor Inc. – USA)
15:30 – 16:00Tea Break in EXPO Hall (Tech Showcase 4)
16:00 – 17:30Technical Session 3: AI in Probing Tech
Session Chair: Muru MEYYAPPAN (Marvell Technology – USA)
16:00 – 16:30Seamless ATE test program generation using a ML approach – Multi-label classification
SenthilKumar DHAMODHARAN, Vaishnavi SARAVANAN, Dinesh ARIVALAGAN, and Lavanya RAJU (Caliber Interconnect Solutions Pvt Ltd – India)
16:30 – 17:00Probes Cleaning Effectiveness challenges for fine pitch and high density Logic Probe Cards with MEMS tips
Wen Jung CHANG (Micron – Taiwan)
17:00 – 17:30Probe Card Maintenance with Artificial Intelligence Assistance System
Adolph CHENG, Ying-Jen CHEN and Anthony FAN (MPI Corporation – Taiwan) Jia-Yu PENG and Prof. Chen-Fu CHIEN (AIMS Research Center, NSTC – Taiwan)
Friday, November 3
TimeEvent
8:45 – 9:00Friday Program Intro
Jerry BROZ, PhD, SWTest General Chair (Delphon – USA)
9:00 – 10:00KEYNOTE 2
Wafer in, SSD out – Famous Last Words of a Test engineer to Manufacturing: “Test All Bits!”

Pradip GHIMIRE
Vice President of Memory Product Solutions
Western Digital, Inc.
10:00 – 10:30Tea Break in EXPO Hall (Tech Showcase 5)
10:30 – 12:00Technical Session 4: Marketing & Innovation
Session Chair: Kenny TANG (TSMC Corporation – Taiwan)
10:30 Р11:003D microprinted probes for testing at sub 20 µm pitch
Wabe KOELMANS, Sam LIN, Anita HUANG, Angus WANG, Edgar HEPP, Francesco COLANGELO, Patrik SCHÜRCH (Exaddon AG – Switzerland)
11:00 – 11:30Silicon Photonic On-Wafer Test
Choon Leong LOU and Ban Ban LIM (STAr Technologies, Inc. – Taiwan), Soon Leng TAN and Wei Liang SIO (CompoundTek Pte Ltd – Singapore)
11:30 – 12:00Probe Card Market Dynamics and Cost of Test Analysis
Panchami Divakar PHADKE (TechInsights – USA)
12:00 – 14:00LUNCH (Tech Showcase 6 – 8)

14:00 – 15:30

Technical Session 5: KGD Technology
Session Chair: Alex YANG (MPI Corporation – Taiwan)

14:00 – 14:30Waveform consideration of shared driver
Shoichi MATSUO (Micron Memory Japan Inc. – Japan)
14:30 – 15:00AMT 5000: KGD Testing at the Die Level Optimized for HBM
Calvin PARK (AMT. CO. LTD. – South Korea)
15:00 – 15:30KGD 56G PAM4 High Speed Testing for data center product – Setup Stability Improvement at Wafer Sort
Wei Hoong YAP (Marvell Technology Inc. – Singapore)
15:30 – 16:00Tea Break in EXPO Hall (Tech Showcase 9)

16:00 – 17:00

Technical Session 6: High Speed Challenge
Session Chair: Joey WU (SWTest Conference – Taiwan)
16:00 – 16:30High Speed Probe Card architecture for High End Devices
Alberto BERIZZI, Alice GHIDONI, Xin-Reng FOO, Chee-Hoe LIN, Ivan GIUDICEANDREA, Giancarlo BRIVIO, Raffaele VALLAURI (Technoprobe – Italy)
16:30 – 17:00Complex Impedance Matching Structures for Advanced On–Wafer AiP Testing
Pratik GHATE (FormFactor, Inc – USA)
17:00 – 17:15Awards for Best Presentations
Jerry BROZ, PhD, SWTest General Chair (Delphon – USA)
17:15 – 19:15Friday Street Food Festival
5 F Chapel+Garden

Times in PDT | Tentative, subject to change
Last Updated: June 28, 2023

Wednesday, November 1 – Benefit Golf Tournament

Thursday, November 2

8:00 – 17:00Attendee Registration Open
10:00 – 13:00Exhibitor Registration Open
12:00 – 14:00Exhibitor Registration Open
Exhibitor Setup in Expo Hall for 34 Booths – Exhibitors Only
13:00 – 13:15
Space Available Seating
Chairman’s Welcome to SWTest Asia 2023
Opening Remarks
Dr. Jerry Broz, SWTest General Chair 
Clark Liu, SWTest Technical Program Chair

Technical Session 1: Getting Manufacturing Smarter

Session Chair: Clark Liu (MJC Taiwan – Taiwan)

13:15 – 13.45
Space Available Seating
Probecard Challenges for Expanding Arrays of Fine Pad Pitch Devices to Test Under Wide Temperature Range
Pouya Dastmalchi, PhD, and Cameron Harker (Formfactor – USA)Presented by Pouya Dastmalchi, PhD (Formfactor – USA)
13:45 – 14:15
Space Available Seating
TestGeni – Test Development Intelligent Automation
Senthil Kumar Dhamodharan, Nachiappan Gnanasambandam, and Vaishnavi Saravanan (Caliber Interconnect Solutions Pvt Ltd – India)  
14:15 – 14:45
Space Available Seating
Advanced Testing Technology for Future Requirement 
Scott Huang (Kore Semiconductor Co., Ltd. – China)  

14:45 – 15:30 – PM Tea Break in EXPO Hall

14:45 – 18:00 – SWTest Asia EXPO Open

Technical Session 2: Meeting Process Challenges

Session Chair: Alex Yang (MPI Corporation – Taiwan)

15:30 – 16:00
Space Available Seating
Thermal Stability and Properties Of PALYSIUM – Revolutionary Probe Material 
Dr. Jonas Fecher (Heraeus Deutschland GmbH & Co. KG – Germany)
16:00 – 16:30
Space Available Seating
New Generation of Kelvin Spring Pins
Lambert Brost (Technoprobe – USA) Presented by Ming-Ting Wu (Technoprobe – Taiwan)
16:30 – 17:00
Space Available Seating
Probe Card Market Dynamics in a Turbulent World
John West and Lin Fu (Yole Intelligence – United Kingdom)  

17:00 – 18:00 – Welcome Reception in Expo Hall

Friday, October 28

8:00 – 14:00Attendee Registration Open
9:00 – 9:15Chair’s Opening Remarks for SWTest Asia 2023
Dr. Jerry Broz, SWTest General Chair
Clark Liu, SWTest Technical Program Chair
9:15 – 10:15
Space Available Seating
Friday Keynote Presentation in General Session Room
Semiconductor, the Information and Communication Technology (ICT) Supply Chain and Geopolitics
Colley Hwang, Digitimes Founder and Chairman
10:00 – 16:00SWTest Asia Expo Open
10:15 – 11:00AM Tea Break in EXPO Hall

Technical Session 3: Test Challenges and Solutions

Session Chair: Dr. Jerry Broz, General Chair (Advanced Probing Systems – USA)

11:00 – 11:30
Space Available Seating
Validation of 55GHz Octal-site Wafer Test Probecard for 5G mmWave device
Peter Cockburn (Cohu, Inc. – United Kingdom)  
11:30 – 12:00
Space Available Seating
Aging parametric testers versus determining measurement system vitality 
Mike Palumbo (Technoprobe – USA)  Presented by Jeff Arasmith (Technoprobe America Inc. – San Jose, USA)
12:00 – 12:30
Space Available Seating
High Parallelism Probe Card on V93K Direct-Probe™ System to Increase Testing Throughput on Automotive IC
John Kao (Formfactor – Taiwan)

12:30 – 14:00 – Expo Open – Lunch in Expo Hall – Two Sessions (12:30 – 13:15 & 13:15 – 14:00)

Technical Session 4: Power, Magnets, and Memory

Session Chair: Dr. Alan Ferguson (Oxford Lasers – United Kingdom)

14:00 – 14:30
Space Available Seating
Testing challenges for latest SiC and GaN devices
Elia Petrogalli (SPEA S.p.A. – Italy) 
14:30 – 15:00
Space Available Seating
Wafer Level Magnetic Testing of STT-MRAM for Process Control and Chip Sorting in Volume Manufacturing
Siamak Salimy (Hprobe – France) and Henry Chung (HTSI – Taiwan)  
15:00 – 15:30
Space Available Seating
Next Generation DRAM Temperature Requirements and Impacts to Full Wafer Contactor Probe Card Performance
Myung Jin Lee (FormFactor – USA) and Hyun Ae Lee (Samsung Electronics – Korea)  

15:30 – 16:00 – PM Tea Break in EXPO Hall

Technical Session 5: Testing for the Next Generation

Session Chair: Joey Wu (SWTest Asia Committee Member – Taiwan)

16:00 – 16:30
Space Available Seating
Challenges and Improvement Actions for HPC Wafer Testing
Oscar Lee, Harvey Lin, and Hung I Tsai (TSMC – Taiwan)  
16:30 – 17:00
Space Available Seating
Known Good Die Memory Wafter Test Challenge Beyond DDR5 4GHz/8Gbps Speed
Alan Liao (FormFactor – USA)
17:00 – 17:30
Space Available Seating
High wattage dissipation under temperature – a new method for testevaluation
Klemens Reitinger (ERS electronic GmbH – Germany)
17:30 – 17:45
Space Available Seating
Awards for Best Presentations
17:45 – 18:45Closing Reception in Expo Hall

There will be a total of fifteen 30-minute technical papers, 10 hours of Expo, 3 tea breaks, 1 lunch, and 2 receptions.