SWTest Asia 2025 Program

Awarded Presentations

Best Overall Presentation

Silicon Photonics Production Wafer Testing by Utilizing Advantest V93000 SOC ATE Platform

Hsu Hao CHANG, Andrew YICK, Calvin YANG, Supreet KHANAPET (Marvell - USA), Christian KARRAS, Gregor KUPKA, Tobias GNAUSCH (Jenoptik - Germany), Derek WU, Jeff JHERN, Natan CHEJANOVSKY, Shiyang DENG (Advantest - USA), Kengo SUZUKI (Advantest - Japan)

Best Data Presentation

The emergence of Advanced Memories and its impact on Probe test solutions.

Alistair LAING (Micron Technology - USA)

Best Poster Presentation

High Pin Count, High Parallelism Vertical Probe Card Characterization Strategies for HVM Automotive Bump Wafer Testing

Cameron HARKER (FormFactor - USA), Yoichi URAKAWA (FormFactor - Japan)

Chairman’s Welcome to SWTest Asia 2025 Opening Remarks

Jerry Broz, PhD
SWTest General Chair
Delphon - USA

Thursday Keynote Presentation

Leading edge test technology and strategy for Automotive products **

Kazuyuki Iwaguro
Vice President of HPC Business Management and Operations Division, Renesas Electronics Corporation - Japan

Friday Keynote Presentations

Rapidus Initiatives and Logic Testing Challenges in Advanced Semiconductor Manufacturing **

Atsuhiko Ohno
Distinguished Engineer, Technology Department #5 (Wafer/Package Test), Engineering Center, Rapidus Corporation - Japan

Session #1: Enabling HBM Test

Session Chair: Eric Chia-Cheng Chang (Intel - USA)

The emergence of Advanced Memories and its impact on Probe test solutions.

Alistair LAING (Micron Technology - USA)

Innovations in Testing for Truly Known Good High Bandwidth Memory Stacks

Alan LIAO (FormFactor - USA), Hiromitsu TAKASU (Advantest - Japan)

Evaluation of Probing Parameters via Post-Probe Micro Bump Pattern Analysis

Bobby CHEN (MPI Corporation - Taiwan)

Session #2: Probe Potpourri

Session Chair: Masatomo Takahashi (ACCRETECH - Japan)

Adaptive Probe Card Cleaning (APC): How AI can reduce cost and extend the lifetime of probe cards

Nunzio RENZELLA (Advantest - Italy)

Inrush Current Suppression Technology for Probe Needle Protection

Kenichi TAKANO (Keysight Technologies - Japan)

Innovative Cleaning Wafer Strategies to Enhance Memory Probing Efficiency

Victoria TRAN (Gel-Pak - USA), Keiichi RYU, Miki NOMURA, Tomonao NAKASHIMA (JEM - Japan)

Session #3: Materials Challenges

Session Chair: Clark Liu (MJC - Taiwan)

New probes for wafer test at highest current densities

Georg FRANZ (T.I.P.S. Messtechnik GmbH - Austria)

Probe Card Analyzer Motherboard Flexibility and Performance Improvement

Stefan THURMAIER (Turbodynamics GmbH - Germany)

Development of a High-Hardness Pd Alloy "TK-SK" with Hardness over 600 HV for Pogo Pin Applications

Keisuke ODAKURA, Kunihiro SHIMA, Takeshi FUSE, Takeyuki SAGAE (TANAKA PRECIOUS METAL TECHNOLOGIES Co., Ltd. - Japan)

Session #4: Photonics

Session Chair: Alan Ferguson (Oxford Lasers - UK)

Photonic Wafer-Level Testing in the Era of AI

Roman ZVAHELSKYI, Andres MACHADO, Florian RUPP, Philipp DIETRICH (Keystone Photonics - Germany)

Silicon Photonics Production Wafer Testing by Utilizing Advantest V93000 SOC ATE platform

A Compact OTA Measurement System with a Lens-Equipped Anechoic Chamber for Antenna-in-Package Modules

Yasushi SHIRAKATA, Kenichi MITSUGI, Shoichi KOSHIKAWA, Tomohisa HOSHINO (Yokowo Co., Ltd. - Japan)

Session #5: Optical Challenges

Session Chair: Jerry Broz (SWTest Conference Chair - USA)

New Method for Mounting Lens Module on Probe Card for CMOS Image Sensors testing

Tomonao NAKASHIMA (Japan Electronic Material Corp - Japan), Hiroki TSUTSUMI (INTER ACTION Corporation - Japan)

Opto-electronic probe card with single-mode fiber array for wafer-level PIC testing

Takaharu OHYAMA, Tomohisa HOSHINO, Yasushi WATANABE, Yui NIIJIMA (YOKOWO CO., LTD. - Japan)

Eclipse Dynamic Probe Card: A Novel Approach for Wafer-Level Photonic Testing with Automated Fiber Array Unit Alignment

Alessia GALLI (Technoprobe - Italy), Andrew YICK, Calvin YANG, Hsu Hao CHANG (Marvell - US)

Session #6: Advance PCB Design

Session Chair: Nobuhiro Kawamata (FormFactor - Japan)

Multi-site Testing at Wafer Sort for Power Devices

Aseem SRIVASTAVA, Tom TRAN (Teradyne, Inc - USA)

Evaluating PWB Power supply characteristics of Stacked vs Single Copper Configurations

Wai Kit K (Lincstech Co., Ltd. - Japan)

Breaking Boundaries: Over 160 Layers, 10mmt Main PCB Redefining High-Density Interconnect

Sohei YASUDA (FICT Limited - Japan)

Poster Sessions

Session Chair: Nyi Nyi Thein (SanDisk Corporation - Japan)

Evaluation of Palladium Alloy Probe with Suppressed Sn Diffusion Reaction

Kenichi SATO, Tomohisa HOSHINO, Naohito ODANI (Yokowo Corporation - Japan), Shohji IKUO (Graduate School of Science and Technology, Gunma University - Japan)

Evaluation of Ultra-High-Multi Layer PCB (124L) for Probe Card

Yasuyuki SHINBO, Toshihiko OGURA (OKI Circuit Technology Co., Ltd. - Japan)

High Pin Count, High Parallelism Vertical Probe Card Characterization Strategies for HVM Automotive Bump Wafer Testing

Cameron HARKER (FormFactor - USA), Yoichi URAKAWA (FormFactor - Japan)

Reinventing Guide Plates for Vertical Probe Cards: Solving Design Constraints with Advanced Laser Drilling and Materials Science

Chris STOKES (Oxford Lasers - United Kingdom)

From Concept to Extended Validation: Localized Thermal Management for AI and GPU Wafer Testing

Klemens REITINGER (ERS electronic GmbH - Germany), Klaudiusz HOLECZEK (Watttron GmbH - Germany)

Development of low CTE LTCC material for ST substrates

Yasuo YAMAZAKI, Eiichi NAKAMURA, Shigekatsu KONO, Takahisa YAMAGUCHI (Nippon Electric Glass Co., Ltd. - Japan)

Combining Material Development & Advanced Processing into High-Quality Foils to optimize application performance and cut costs

Matthias WEGNER, Martin SENZEL, Nail AKROUTI (Heraeus Precious Metals - Germany)

Delay Characterization for FPGA PUFs Using Fully Synchronous On-Chip PLL Techniques

Kentaroh KATOH, Toru NAKURA (Fukuoka University – Japan), Haruo KOBAYASHI (Gunma University – Japan)

Automated Cause-Effect Discovery on Multivariate Time-series Data -Semiconductor production dynamics and process anomaly **

ChenDing MAO, Ke LI (University of Tsukuba – Japan)

Technologies to support data transmission with extremely high frequencies (400G+) on printed circuit boards

Quaid Joher FURNITUREWALA (Advantest America Inc - USA)

Multi-criteria Parameter Optimization for Complex Systems – Multi-Objective Scheduling Case **

ChenDing MAO, Hiroto AKIZUKI, Shoyo YOSHIDA (University of Tsukuba – Japan)